1. Field
Apparatuses and methods consistent with exemplary embodiments generally relate to clocks, in particular multi-phase clocks.
2. Description of Related Art
Persons of ordinary skill in the art understand terms and basic concepts related to microelectronics that are used in this disclosure, such as “voltage,” “signal,” “logical signal,” “clock,” “phase,” “period,” “trip point,” “inverter,” “buffer,” “propagation delay,” and “multiplexer.” Terms and basic concepts like these are apparent to those of ordinary skill in the art and thus will not be explained in detail here.
Through this disclosure, a logical signal is a signal of two states: “high” and “low,” which can also be re-phrased as “1” and “0.” For brevity, a logical signal in the “high” (“low”) state is simply stated as the logical signal is “high” (“low”), or alternatively, the logical signal is “1” (“0”). Also, for brevity, quotation marks may be omitted, and the logical signal is simply stated as the logical signal is high (low), or alternatively, the logical signal is 1 (0), with the understanding that the statement is made in the context of describing a state of the logical signal. A logical signal is embodied by a potential voltage. The logical signal is “high” (“low”) when the voltage is above (below) an associated trip point of a logical device that receives and processes the logical signal. For brevity, the associated trip point of a logical device is simply referred to as the trip point of the logical signal. In this disclosure, the trip point of a first logical signal may not be necessarily the same as the trip point of a second logical signal.
If a logical signal is “high” (or “1”) it is said to be “asserted.” If the logical signal is “low,” it is said to be “de-asserted.”
A clock signal is a signal having a period. For brevity, hereafter, “clock signal” is simply referred to as “clock.”
A multi-phase clock includes a plurality of clocks of the same period and ideally, with uniformly displaced phases. For instance, an eight-phase 1 GHz clock includes eight clocks of the same period 1 ns but eight uniformly displaced phases: 0 degrees, 45 degrees, 90 degrees, 135 degrees, . . . , and 315 degrees. Concepts of “period” and “phase” associated with a “clock” are well understood to those of ordinary skill in the art and thus not explained in detail. In conventional practice, due to non-ideality of existing circuit embodiments, the plurality of clocks may not be uniformly displaced in phase or at least are not substantially uniformly displaced.
What is desired is a self-calibrating multi-phase clock circuit that can output a multi-phase clock of uniformly displaced phases.